基于FPGA实现的OFDM同步设计

The Hardware Implement of an OFDM Synchronizer Based on FPGA

介绍利用二次最大似然方法联合实现符号定时同步和载波同步的方法,并阐述基于FPGA实现的过程。传统的基于循环前缀的OFDM系统符号同步方法只局限于在一个符号内进行相关运算和功率运算。提出的算法把相关运算和功率运算范围从一个符号扩展到连续多个符号,使估计器的性能得到明显改善,ModelSim仿真结果显示,在信噪比为3．1dB时,符号同步的样值偏差在±2个采样点之内,载波频率偏差精度为1%,此系统已在实际系统中得到应用。

In this paper a hardware architecture for an OFDM synchronizer is presented. The algorithm is based on the correlation introduced by the cyclic prefix of a few continuous OFDM symbols, which is exploited in the time domain where both time and frequency offset are estimated simultaneously, the performance of this system is very good. Simulation results by ModelSim show that the symbol synchronization error can be controlled in ±2 pilots, the carrier frequency warp precision is 1%. It has been used in reality.