摘要
提出了基于总会聚点的有序二叉决策图(BDD)学习方法,用以提高使用布尔可满足性方法的组合电路测试模式生成系统的性能.它有效地结合了基于布尔可满足性、BDD和结构等方法各自的优点,可以有效地解决局部信号赋值之间的关联性.其具体的做法是:首先分析电路的拓扑结构,收集局部信号的关联信息,构造局部电路结构的BDD图;之后从该图中学习出引起冲突赋值的合取范式子句,将这些学习的子句增补到子句库中,用以限制和修剪测试生成的搜索空间,从而加速测试模式的生成过程.实验结果说明了该方法的有效性.
A TRL-based (total reconvergence line) BDD (binary decision diagram) learning heuristics is presented in this paper to improve the efficiency of test pattern generation for combinational circuits based on the Boolean satisfiability (SAT) method. This heuristics dovetail the respective strengths of BDD and SAT and circuit structure based methods to solve local signal correlations. More specifically, it first makes an analysis of the circuit topological structure to gather the information on local signal correlation by means of BDD learning. Then the above learned information in the conjunctive normal form clauses is used to restrict and focus the overall search space of SAT-based test pattern generation. The experimental results demonstrate the validity of this approach.
出处
《测试技术学报》
2007年第1期63-69,共7页
Journal of Test and Measurement Technology
基金
国家自然科学基金资助项目(50390060
50335020)
关键词
测试模式生成
布尔可满足性
二叉决策图学习
test pattern generation
boolean satisfiability
binary decision diagram learning