基于CPLD的等效电路的设计

Equivalent Circuit Design Based on CPLD

将等效时间采样技术用于低速的AD转换器,可以实现对宽带模拟信号的高速采集,不仅降低了系统实现的难度,还节约了系统成本.在此论述了基于等效时间采样的高速数据采集技术的基本原理以及整体实现方案.系统中的逻辑控制部分采用CPLD来实现,大大提高了系统的集成度.

Using slow rate ADC can realize data acquisition to wide frequency analogy signal by using equivalent- time sampling technology, which reduces not only the difficulty of realization,but also the cost of the system. The paper mainly states the theory and method of high - speed data acquisition system based on equivalent time sampling. The logic control unit of the system are integrated in CPLD. The integrated density of the circuit is improved greatly.