ASIP处理器的可重定位编译器的设计

Design of a Retargetable Compiler for ASIP

可重定位的编译器对特定应用的指令集处理器ASIP(ApplicationSpecificInstructionProcessor)的设计至关重要。文章利用开源的ORC(OpenResearchCompiler)编译器框架,以提出的一种ASIP处理器的结构模型为目标,进行了其可重定位的编译器的设计。并在指令调度和寄存器分配阶段针对这种ASIP处理器的结构做了优化。实验结果表明,编译器具有很好的可重定位性,指令调度和寄存器分配的优化也获得了较好的效果。

A retargetable compiler is one of the key steps in design of Application Specific Instruction Processor （ASIP）. This paper describes the process of design of retargetable compiler for our ASIP architecture model based on ORC （Open Research Compiler） framework： We also present optimization in instruction scheduling and register allocation phase for this ASIP architecture,. The experimental results indicate the compiler is well retargetable and optimization in instruction scheduling and register allocation is effective.