摘要
文章提出了一种基于双三次插值算法的缩放引擎有效的设计方法,并通过FPGA验证表明该设计方法切实可行。首先介绍了双三次插值算法的基本原理,接着提出了缩放引擎的系统结构,并系统地论述了放大单元的实现及高效的滤波器设计。最终,在Virtex2系列FPGA上实现了该图像缩放引擎。结果表明该设计能有效应用于图像的缩放处理,且图像缩放效果明显提高。
The paper presents a design method of image scaling engine based bicubic interpolation algorithm. First, the basic theory of bicubic interpolation algorithm is introduced. Then, on the basis of this theory, a new design method for scaling engine is presented. Meanwhile, the scaling up unit and effective Filter are specially introduced. Finally, the FPGA experimental results show that the method can greatly improved the quality of scaling module.
出处
《微电子学与计算机》
CSCD
北大核心
2007年第1期49-51,共3页
Microelectronics & Computer
关键词
图像缩放
插值算法
滤波器
Image scaling, Interpolation algorithm, Filter