CMOS亚阈偏置恒流源的分析与设计

Design and Analysis of a Sub-threshold Operation CMOS Reference Current Source

由于IC芯片设计普遍采用全局偏置技术,偏置电路的稳定性对整个电路的性能有较大影响。文中利用MOS管工作在亚阈值区的偏置判断条件,分析了一种基于VT的工作在亚阈值区的偏置电流源,能够满足提供较小工作电流、低功耗的要求,同时对电源变化敏感度极低,在电源电压0.7 V^5 V变化时输出电流仅变化不到0.9%。整个电路采用CSMC 0.6μm双层多晶硅双层金属标准工艺实现,采用Cadence Spectre进行模拟仿真,仿真结果证明了该电流源具有低功耗和高电源抑制比特性。

Because of the universal adoption of global biasing technique for IC design, the stability of biased circuit has important influence on the performance of the whole circuit. One kind of bias current reference based on VT and working in its subthreshold domain, which is able to meet the requirement of less working current and low power consumption is analyzed in this paper. At the same time, the bias current reference is extremely unsensitive to current change. The output current shifts within 9‰ while the power voltage changes from 0. 7 V to 5 V. The entire circuit is simulated with Cadence Spectre, and the result shows low power con- sumption and high PSRR.