基于周期控制的逆变器全数字锁相环的实现和参数设计

Implement and Parameter Design of DPLL for Invertors Based on Cycle Control

研究了一种基于周期控制的逆变器全数字锁相环的建模和参数设计。传统过零鉴相锁相环虽然实现简单,但同步信号在含有谐波、毛刺情况下会存在多个过零点,以致锁相失败。为了解决这一问题,该文提出了基于离散傅里叶变换鉴相的全数字锁相环。离散傅里叶变换可以从任意信号中抽取基准频率倍频次信号的相位、频率和幅值,可以解决谐波对外同步信号的影响,从而实现周期控制锁相环对谐波的识别。该文给出了其数字域模型和参数设计方法,仿真和实验证实了该方法的可行性。

This paper focused on the modelling and parameter design of a period-controlled fully digital phase-locked loop. Although the zero crossing detection DPLL can be implemented easily and conveniently, it lies in the inability when the synchronization signal has multi-zerocrossing resulting from harmonics and spikes. To resolve this problem, a new phase detection method based on the discrete Fourier transformation is proposed. The DFF phase detection method can take out frequency, phase and magnitude of the base frequency signal from a random synchronization signal. The math model and parameter design method are also proposed. Simulations and experiments validate its feasibility.