摘要
简要介绍了准同步二次群复接的基本原理,分析了正码速调整的基本原理及所涉及的一般问题,在此基础上,用VHDL语言对准同步复接电路进行全数字化描述,并在Max+PlusⅡ环境中进行编译和仿真,得到了理想的结果,实现了基群速率2 048 kb/s的数字信号准同步通信二次群的复接器,其主要功能是在复接端将4个支路的2 048 kb/s数据通过正码速调整技术,合路成1路8 448 kb/s的高速数据流,由仿真结果可以看出系统的设计与理论值相符。
This paper briefly presents the PDH basic principle of secondary group multiplexing,analyses the elementary theory of positive justification,and gives a totally digital description to PDH multiplexing circuit using VHDL language based on this principle. Translation,edit and simulation are done in the environment of Max+Plus Ⅱ,Ⅱ, according to all this work, we get the supposed results,and realize the PDH secondary group multiplexing of digital signals whose velocity is 2 048 kb/s. The main function of the digital multiplexer can be accomplished that multiplexes four branches of 2 048 kb/s into one data flow of 8 448 kb/s according to positive justification. The imitation result we got at last matches the theoretical value.
出处
《现代电子技术》
2007年第3期81-83,86,共4页
Modern Electronics Technique