应用分布式算法在FPGA平台实现FIR低通滤波器

Applies the DA algorithm to realize the FIR filter in the FPGA platform

在利用FPGA实现数字信号处理方面,分布式算法发挥着关键作用,与传统的乘加结构相比,具有并行处理的高效性特点。本文研究了一种16阶FIR滤波器的FPGA设计方法,采用VerilogHDL语言描述设计文件,在XilinxISE7.1i及ModelSimSE6.1b平台上进行了实验仿真及时序分析,并探讨了实际工程中硬件资源利用率及运算速度等问题。

In using the FPGA realization digital signal processing aspect, the DA algorithm is playing a key role, while compare the structure with the tradition, it has the parallel processing and the effectiveness special artillery. This article has studied 16 steps FIR filter based on FPGA, uses Verilog HDL description design document, platform has carried on the experimental simulation and the succession analysis in Xilinx ISE 7. li and ModelSim SE 6.1 b. And has discussed the hardware question and so on resources use factor and operating speed in the actual project.