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单通道通讯模式异步流水线控制器 被引量:2

Asynchronous pipeline controllers based on a single-track communication protocol
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摘要 为了实现异步电路在实际应用中的低功耗、高性能特性,提出了一种基于单通道通讯协议的高速异步流水线控制单元和一种使用Muller C单元的高鲁棒性的QDI(quasidelay insensitive)异步流水线控制单元。第1种异步流水线控制单元采用独立的正反向响应电路,使得比近期提出的超高速异步流水线控制单元GasP电路的正向响应减小了50%的信号翻转。该电路使用TSMC 0.25μm CMOS工艺实现,HSPICE模拟结果表明与GasP电路相比正向响应时间减少38.1%,可以工作在2.2 GHz;第2种控制器与流行的QDI异步控制器STFB(single-track full-buffer)电路相比,以较少的面积代价,实现了时序验证上的极大简化。 A fast low power, high performance asynchronous pipeline controller was designed with a forward and reverse latency of 2 transitions. A robust quasi delay insensitive asynchronous pipeline controller was also designed using a Muller C-gate. The first controller uses independent restoring and asserting circuits with 50% less forward signal transitions than the popular ultra hlgh-speed circuits GasP. The controller has been designed with TSMC 0.25μm CMOS process technology and simulated using HSPICE. Results show that the controller has 38. 1% less forward latency than GasP circuits and can work at 2.2 GHz. The second controller greatly simplifies the timing verifications with lower area cost than the STFB (slngle-track full-buffer) circuit.
作者 肖勇 周润德
出处 《清华大学学报(自然科学版)》 EI CAS CSCD 北大核心 2007年第1期135-138,共4页 Journal of Tsinghua University(Science and Technology)
关键词 大规模集成电路 异步电路 异步流水线 准延时无关电路 large scale integrated circuits asynchronous circuit asynchronous pipelines quasi delay insensitive
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参考文献6

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同被引文献17

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