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一种新型CMOS误差放大电路的设计

A novel CMOS error-amplifier for DC-DC convertor
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摘要 设计了一种采用带隙输入结构的误差放大电路,其带隙基准电压由电路内部产生,第二级共源共栅电路产生高增益。电路在产生带隙基准电压的同时也能检测反馈电压的变化,从而简化了电路结构,降低了静态功耗,节省了芯片面积。设计工艺采用BCD 0.6-μm BICMOS,文章的最后给出了仿真结果。此误差放大电路的低频增益达到68dB,相位裕度为63度,带宽高达82MHz。此电路已应用到DC-DC变换器芯片设计项目中。 An error-amplifier circuit using bandgap input structure is presented. The bandgap reference voltage is serf-generated by the circuit , the open-loop gain is mainly provided by the second stage cascode circuit. As the bandgap reference voltage is serf-generated, the variety of feed back voltage is detected. Based on the simplified structure, the static power comsuption is reduced and chip's area is also saved. This circuit is designed on the BCD 0.6-μm BICMOS process and its simulation results are presented. The error amplifier has a low frequence gain of 68 dB,a phase margin of 63 degree , a bandwidth of 190kHz, and a high frequence gain of 50dB.The circuit has been applied in chip design project of DC-DC convertor.
出处 《电测与仪表》 北大核心 2007年第1期52-54,32,共4页 Electrical Measurement & Instrumentation
关键词 DC—DC变换器 误差放大器 带隙基准 共源共栅电路 DC-DC convertor , error-amplifier bandgap reference cascode
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