摘要
论文根据一种改进的AES密码算法,提出了其低功耗ASIC设计与实现的方法。通过分析CMOS电路功耗产生原因,介绍了动态功耗管理、门控时钟和操作数隔离等低功耗设计方法,给出了该AES密码算法详细的低功耗实现方案。用Power Compiler做功耗分析后发现,优化后的功耗比优化前的功耗降低了43%,满足低功耗的要求。
An improved AES algorithm was proposed in this paper, and its low-power ASIC design was discussed. By analyzing the source of CMOS circuit＇s power consumption, a detailed solution which considered several low-power techniques, such as dynamic power management, clock gating and operand isolation, was provided. After estimating with Power Compiler, the power which was optimized could be reduced to 57% of which was not optimized, so the solution can satisfy the requirement of low-power.
出处
《信息安全与通信保密》
2007年第2期160-162,共3页
Information Security and Communications Privacy
关键词
AES算法
轮操作
功耗管理
时钟门控
操作数隔离
AES algorithm
round operation
power management
clock gating
operand isolation
