基于PXI总线的高速数据采集模块设计

Design of High-Speed Data Acquisition Module Based on PXI Bus

基于PXI总线消息基器件的高速数据采集系统,是集输入信号调理,A/D转换器,FIFO存储等功能于一体的数采模块。A/D转换器采用AD6645,转换后的数据存入FIFO,由主机通过PXI总线读出,整个转换时序及数据触发深度、触发电平等由FPGA芯片控制。实验表明,该模块具有14位分辨率,80MSPS采样率并运行稳定。

The high-speed data acquisition system based on PXI bus is integrated of signal conditioning module, A/D converter, FIFO storage and some other functions. AD6645 is adopted by A/D to convert the signal, after that the converted data are stored in FIFO and then read by host computer through PXI bus. The FPGA controls the whole converting schedule, triggering depth and triggering level. It has been proved by testing： the system has 14bit resolution rate, 80MSPS sampling rate and stable operating state.