基于FPGA的VME总线Slave接口设计

Design of VME Bus Slave Interface Based on FPGA

由于VME总线的高性能、并行性、实时性、高可靠性4大特点及模块结构具有良好的抗震性、抗冲击能力,尤其是高可靠性,使其在核工业控制和航空航天领域得到广泛的应用。但是由于VME总线的结构复杂所以在设计上相对复杂,而且采用商用VME接口芯片却往往很难满足航天等特殊环境对高可靠性要求较高的领域要求,故而根据卫星综合电子系统姿态控制的总体需求提出一种利用FPGA来完成VME总线的从设备Slave的逻辑接口功能的设计,使其可以实现VME接口逻辑功能,同时能通过功能裁剪来满足特殊性要求。

VME bus has been widely used and is developing fast in nuclear industrial and aeronautic ＆ astronautic fields, because of its four special characteristics of high quality, parallelity, real-time and high reliability, as well as its wonderful aseismatic and shockresistant module construction, and especially because of its high reliability, However, it is comparatively complex in design for its complex construction, and is hard for common commercial VME bus interface chip to meet some special environment conditions such as astronautic condition. Therefore a way of using FPGA to design a slave which can perform the logic function of interface of VME slave on basis of main demand of satellitic integrative electric system on attitude control is investigated. The slave can perform not only the function of VME bus but also the user＇ s special function of satellitic GNC（ guidance navigation and control） data acquisition by pruning the logic function.