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Realizing High Breakdown Voltage SJ-LDMOS on Bulk Silicon Using a Partial n-Buried Layer 被引量:1

具有部分n埋层的高压SJ-LDMOS器件新结构(英文)
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摘要 A new design concept is proposed to eliminate the substrate-assisted depletion effect that significantly degrades the breakdown voltage (BV) of conventional super junction-LDMOS. The key feature of the new concept is that a partial buried layer is implemented which compensates for the charge interaction between the p-substrate and SJ region,realizing high breakdown voltage and low on-resistance. Numerical simulation results indicate that the proposed device features high breakdown voltage,low on-resistance,and reduced sensitivity to doping imbalance in the pillars. In addition, the proposed device is compatible with smart power technology. 针对衬底辅助耗尽效应降低常规super junction LDMOS(SJ-LDMOS)击穿电压的不足,提出了一种新的具有部分n埋层的高压SJ-LDMOS器件结构.通过该部分n埋层,不仅补偿了由于衬底辅助效应所致的电荷不平衡现象,实现了高的击穿电压,而且该埋层在器件正向导通时为电流提供了辅助通道,减小了器件导通电阻.分析了器件结构参数和参杂对器件击穿电压和导通电阻的影响,结果表明文中所提出的新结构具有高的击穿电压、低的导通电阻以及较好的工艺容差等特性.此外,该结构与智能功率集成技术兼容.
出处 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2007年第3期355-360,共6页 半导体学报(英文版)
基金 国家自然科学基金资助项目(批准号:60436030,60576052)
关键词 super junction LDMOS breakdown voltage substrate-assisted depletion effect 超级结 击穿电压 LDMOS 衬底辅助耗尽效应
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参考文献12

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同被引文献9

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