摘要
提出了一种混合FPGA新结构——新颖的AND-LUT阵列结构.其创新之处在于由可编程逻辑簇(Cluster)和相关的连接盒(CB)组成的可编程逻辑单元片(Tile)可以根据应用需要灵活地配置成PLA或LUT,前者较适合于高扇入逻辑,后者较适合于低扇入逻辑.因此,结合两者优点的新颖AND-LUT阵列结构在实现各种输入的用户逻辑时都能保持很好的逻辑利用率.MCNC电路测试结果进一步表明,同一逻辑电路在文中提出的混合FPGA新结构中实现与在基于LUT的对称FPGA结构中实现相比,面积平均可节省46%,因而大大提高了FPGA器件的逻辑利用率.
A new hybrid FPGA architecture is proposed. The logic tile,which consists of a logic cluster and related connection boxes （CBs）, can be configured as either programmable logic arrays （PLAs） or look-up tables （LUTs）, This architecture can be classified as an AND-LUT array. PLAs are suitable for the implementation of high fan-in logic circuits, while LUTs are used to implement low fan-in logic circuits. As a result, the proposed hybrid FPGA architecture （HFA） is more flexible to improve logic density. Experiments based on MCNC benchmark circuits were performed in both the hybrid architecture and conventional LUT-based symmetrical FPGA architecture in term of area consumption. Preliminary results indicate that on average, the area is reduced by 46% using the new hybrid architecture.
