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一种新颖的高电源抑制比亚阈值MOSFET电流基准源 被引量：3

A Novel Current Reference Source with High PSRR Based on Subthreshold MOSFET's
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摘要 基于亚阈值MOSFET,提出了一种新颖的高电源抑制比(PSRR)电流基准源。基准电路充分利用工作在亚阈值区MOSFET的I-V跨导特性和改进的具有高负反馈环路增益预电压调制,为电流基准核电路提供电源。电路设计采用SMIC 0.18μm标准CMOS数字工艺技术。在1.5 V电源电压下,电路输出1.701μA的稳定电流,在-40℃到150℃温度范围内,具有非常低的温度系数(2.5×10-4μA/℃);并且,在宽泛的频率范围内,具有很好的电源噪声抑制能力。电源抑制比在dc频率为-126 dB,在高于1 MHz频率范围内,仍能保持-92 dB。基准电路在高于1.2V电源电压下可以稳定工作,并具有很好的CMOS工艺兼容性。 A novel current reference source based on subthreshold MOSFET＇s with high power supply rejection ratio （PSRR） is presented. The proposed circuit takes full advantages of the I-V transconductance characteristics of MOSFET operating in the subthreshold region and the enhanced pre-regulator with high gain negative feedback loop to supply power for the current reference core circuit. Designed with SMIC＇s 0. 18 μm standard CMOS digital process technology, the circuit exhibits a stable current of about 1. 701 μA with a very low temperature coefficient （2.5×10^-4 μA/℃） in the temperature range from -40 ℃ to 150 ℃ at 1.5 V supply voltage, and also achieves a best PSRR over a broad frequency range, which is about -126 dB at dc and maintains -92 dB at 1 MHZ and above The proposed circuit operates stably at supply voltage higher than 1.2 V and it has a good process compatibility.
作者 余国义 邹雪城
机构地区 华中科技大学电子科学与技术系
出处 《微电子学》 CAS CSCD 北大核心 2007年第1期113-117,共5页 Microelectronics
关键词 电流基准源 电压调制器 亚阈值MOSFET CMOS集成电路 Current reference source Voltage regulator Subthreshold MOSFET CMOS IC
分类号 TN432 [电子电信—微电子学与固体电子学]
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参考文献12

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同被引文献10

  • 1王晗,叶青.0·6V电源电压的CMOS基准源设计及稳定性分析[J].Journal of Semiconductors,2006,27(8):1508-1513. 被引量：4
  • 2Tsividis Y. Accurate analysis of temperature effects in Ic- W characteristics with applicationto bandgap ref- erence source[J]. IEEE Journal of Solid-State Circuits, 1980,15(6) :1076-1084.
  • 3Banba H, Shiga H. A CMOS bandgap reference circuit with Sub-l-V operation[J]. IEEE Journal of Solid-State Circuits, 1999,34(5) :670-674.
  • 4Taur Y,Ning T H. Fundamentals of modern VLSI devi- ses[M]. New York: Cambridge University Press, 1998.
  • 5Leung K N,Mok P K T. A Sub-l-V 15-ppm/'C CMOS bandgap voltage reference without requiring low thresh- old voltage device[J]. IEEE Journal of Solid-State Cir- cuits, 2002,37 (4) .526-530.
  • 6Ueno K, Hirose T. A 300 nW, 15 ppm/'C, 20 ppm/V CMOS voltage reference circuit consisting of subthresh- old MOSFETs [J]. IEEE Journal of Solid-State Cir- cuits, 2009,44 (7) : 2047-2054.
  • 7Vita G D,lannaccone G. A sul>-l-V, 10 ppm/'C, nanop- ower voltage reference generator[J]. IEEE Journal of Solid-State Circuits,2007,42(7) :1536-1542.
  • 8Cheng M H, Wu Z W. Low-power low-voltage refer- ence using peaking current mirror circuit[J]. Electron Lett, 2005,41 (10) : 572-573.
  • 9吴文兰,刑立东.带隙基准源的现状及其发展趋势[J].微计算机信息,2010,26(17):186-188. 被引量：4
  • 10田京辉,黄其煜.非带隙低功耗低温漂CMOS电压基准电路设计[J].微电子学与计算机,2013,30(5):35-37. 被引量：2

引证文献3

微电子学
2007年 第1期

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