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一种应用于高速高精度模数转换器的比较器 被引量：3

Comparator Applicable for High Speed High Resolution ADC
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摘要 提出了一种基于BiCMOS工艺的高速高精度时钟控制比较器.该比较器包含一级预放大器、动态锁存器及时钟控制反相器.预放大器采用正反馈放大技术保证了增益和速度,锁存器采用两个正反馈锁存器和额外的反馈环路提高了锁存的速度.基于3.3V0.35μmBiCMOS工艺进行了设计和仿真,结果表明该比较器可以应用于160MS/s高精度流水线模数转换器. A high speed high resolution clocked comparator circuit in BiCMOS technology is presented. The comparator includes a preamplifier , a dynamic latch and a clocked inverter. By applying the positive feedback technique, a sufficient gain as well as speed of the preamplifier is achieved. The speed of the dynamic latch is improved by employing two cross-coupled latch and other feedback circuits. The comparator is designed and simulated in a BiCMOS 3.3 V.0. 35μm technology and the result shows that it meets the requirement of a 160 MS/s high resolution pipelined ADC.
作者 吴晓勇 马剑平
机构地区 西安理工大学电子工程系
出处 《电子器件》 CAS 2007年第1期119-122,共4页 Chinese Journal of Electron Devices
关键词 高速高精度模数转换器 比较器 正反馈 预放大器 锁存器 high speed high resolution ADC comparator positive feedback preamplifier latch
分类号 TP335 [自动化与计算机技术—计算机系统结构]
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参考文献10

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电子器件
2007年 第1期

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