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一种新型高输出阻抗,高电流匹配精度电流镜的设计 被引量:3

Novel Design of Current Mirror with High Output Impedance and High Current Matching Accuracy
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摘要 电流镜是模拟电路设计的基础单元之一,在高性能模拟电路设计中,电流镜的电流匹配精度和输出阻抗是决定电路性能的最重要的参数之一.设计一种新型高输出阻抗、高电流匹配精度电流镜,采用了一种新颖的五级负反馈增益方法来增加电流镜的输出阻抗,同时还通过改进DMCM电路结构提高了电流镜的电流匹配精度,使得设计的电流镜在任何Iin下都保证有较高的电流匹配精度,而且这种新型电流镜也有近似于传统两级共源共栅电流镜的摆幅.采用TSMC 0.18μm,1.8/3.3CMOS标准工艺,在3.3V电源下,输出阻抗能达到18GΩ以上,并且电流匹配精度接近于0.01%,输出电压摆幅为1.28~3.3v。 Current mirror is one of the basic cell in analog circuit design. The accuracy and output impedance are the key parameters to determine the performance of a current mirror in high performance analog circuit design. To design a novel current mirror with high output impedance and high current mathing accuracy , a novel feedback gain stage is used to increase the output impedance at the same time , the design promotes the matching accuracy significantly by improving the DMCM current mirror, it proposed that the new current mirror has high matching accuracy in any Iin Moreover the new current mirror also has output swing similar as traditional two stage cascade current mirror. When the supply voltage is 3.3 V, the output impedance can reach 18 GΩ, and the matching accuracy is under 0. 01%, output swing is 1.28-3. 3 V.
出处 《电子器件》 CAS 2007年第1期126-128,共3页 Chinese Journal of Electron Devices
基金 湖南省自然科学基金资助项目(05JJ30115)
关键词 电流镜 负反馈增益级 高输出阻抗 高电流匹配精度 current mirror feedback gain stage high output impedance high current mathing accuracy
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  • 1Kawahito S and Tadokoro Y,CMOS class-AB Current Mirrors for Precision Current-Mode Analog-Signal-Processing Elements[J].IEEE Trans.CAS Ⅱ,Dec.1996,43 (12):843-845.
  • 2Wang Z,Analytical Determination of Output Resistance and DC Matching Errors in MOS Current Mirrors[J].IEEE Proc.Pt G,Ocu 1990,137(5):397-404.
  • 3Serrano T and Linares-Barranco B,The Active-Inputregulated-Cascode Current Mirror[J].IEEE Trans.CAS I,June.1994,41(6):464-467.
  • 4Palmisano G,Palumbo O.and Pennisi S.High Linearity CMOS Current Output Stage[J].Electron,Lett 1995,31:789-790.
  • 5Sackinger E and Guggenbuhl W.A high-Swing,High Impedance MOS Cascade Circuit[J].IEEE J Solid State Circuits,1990,25:289-298.
  • 6Song B G,Chang I k,Kwon O J,Park J G,Kwack K D.A Simulation-Based Analog Cell Synthesis with Improved Simulation Efficiency[C]// TENCON99,Proceedings of the IEEE Region 10 Conference,Volume:2,1999 vol.2:1018-1021.
  • 7Accurate and High Output Impedance Current Mirror Suitable for CMOS Current Output Stages IEE 1997,Electronics Letters Online 19970743 8 April 1997.
  • 8模拟CMOS集成电路设计[M].毕查德.拉扎维.西安交通大学出版社,2002.12.

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同被引文献25

  • 1许长喜.低压低功耗CMOS带隙电压基准及启动电路设计[J].Journal of Semiconductors,2005,26(10):2022-2027. 被引量:5
  • 2吴杰,邱关源.CMOS电流镜及其应用[J].湖南大学学报(自然科学版),1996,23(1):95-100. 被引量:6
  • 3朱樟明,杨银堂,尹韬.一种低压CMOS衬底驱动共源共栅电流镜[J].固体电子学研究与进展,2006,26(4):527-530. 被引量:3
  • 4刁冬梅,杨银堂,朱樟明.电流源的失配分析及设计研究[J].电子元器件应用,2007,9(2):32-33. 被引量:1
  • 5ALAN H.Theart of analog layout[M].北京:清华大学出版社,2004:435-439.
  • 6HOUDA B G, NEJIB H, KAMEL B. Low supply voltage high speed CMOS current mirror for analog design [C]// IEEE ICM. Cairn, Egypt. 2007: 369-372.
  • 7BAUWE L J, OSSIEUR P, QIU X Z, et al. Highspeed active-input cascode current Mirror [J]. Elec Lett, 2006, 42(3):128-130.
  • 8ZHANG G-B, LIU J, JOHNSON D K, et al. An accurate current source with on-chip self-calibration circuits for kow-voltage current-mode differential drivers [J].IEEE Trans Circ and Syst - I: Regular Papers, 2006, 53(1): 40-47.
  • 9SUNAY S, STEVE C. A model for temperature in- sensitive trimmable MOSFET current sources [J]. IEEE Trans Circ and Syst- II: Express Briefs, 2007, 54(10) : 853-857.
  • 10Zhang Xuguang, EI-Masry Ezz I. A Regulated Body-driven COMS Current Mirror for Low Voltage Applications[J]. IEEE Trans. on Circuits and Systems II: Express Briefs, 2004,51 (10) :571 - 577.

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