摘要
从剖析快速以太网物理层的基本工作原理入手,解释了4B/5B数据编解码与时钟同步的基本原理,结合FPGA,阐述了基于典型物理层芯片RTL8208的高速数字视频传输的基本设计思想.给出了传输效率不低于90%视频数据MAC层帧格式以及实用的系统基本结构.最后就板级设计准则和关键设计参数进行了简要说明.
The main goal of this paper is to introduce a method on how to use the fast Ethernet PHYs to transmit real time high speed digital video data. In order to fully understand the method, the primarily operation principle of the fast Ethernet PHYs was explained firstly, such as the 4B/5B encoding and decoding, RMII interface and clock synchronization. With special design, a new frame structure and MAC architecture appropriate to real time high speed digital video transmission at efficiency higher than 90% were given. In addition, the main design thoughts, some useful PCB design principles and some key parameters related with RTL8208 were also given.
出处
《电子器件》
CAS
2007年第1期144-147,151,共5页
Chinese Journal of Electron Devices
