基于FPGA的新型抗混叠CIC抽取滤波器的设计

New anti-aliasing CIC filter design and realization on FPGA

针对传统的积分梳状滤波器在用作抽取抗混叠滤波器时,通带偏差和混叠镜像衰减难以满足软件无线电系统需要的问题,设计采用内插二阶多项式级联锐化CIC滤波器的改进方法,扩展了其通带带宽的同时提高了阻带衰减,并应用SOPC设计软件dspbuilder在一片FPGA芯片上予以实现,简化了设计流程,降低了成本和开发周期.

The bias of passband and aliasing - imaging attenuation of the conventional Cascaded Integrator - Comb （CIC） filter, which is used as antialiasing filter for decimating and interpolating, always can＇t satisfy the requirement of software radio system . In this paper, an improved method with Sharpened CIC filter cascading Interpolated Second-Order Polynomials （ISOP） is proposed, it widens the passband and increases the stopband attenuation. Finally it is implemented on a FPGA chip by SOPC tool： dspbuilder. It simplifies the design flow, reduces the cost and development time.