摘要
为适应地址、读/写数据在不同传输方式下的特性,并保持SoC总线上IP可复用的特点,提出了传输透明的SoC总线低功耗环算法.描述了低功耗传输与总线编码的算法原理,以及在地址线、读/写数据线上的实现结构.在概率模型的基础上进行了分析,低功耗环有效地降低了SoC总线的信号翻转率.通过建立网络终端测试系统,在不同传输方式所占比例不同的情况下进行了测试,结果表明,低功耗环算法达到了降低功耗的目的.
A transfer transparent algorithm of low power wrapper was proposed to meet various transfer requirements of address and read/write data and maintain the reusability of intellectual property (IP) on SoC bus. The algorithm was described based on the principles of low power transfer and bus encoding, and then its implementation structures on address and read/write data lines were given. Analysis result based on probability model showed that the turnover rate of bus signals was reduced effectively. After building a testing system of network terminal, the average bus power consumption with different transfer type proportion was tested. Testing result showed that the wrapper algorithm decreased SoC bus power.
出处
《浙江大学学报(工学版)》
EI
CAS
CSCD
北大核心
2007年第2期221-225,共5页
Journal of Zhejiang University:Engineering Science
基金
国家"863"高技术研究发展计划资助项目(2003AA141050
2003AA1Z1060)
关键词
系统芯片
低功耗
总线
环
system on chip (SoC)
low power
bus
wrapper