摘要
设计了一种应用于数字音频的插值滤波器。该滤波器采用多相插值原理,硬件电路包括并行数据输入接口、8倍插值器、16倍采样保持电路,实现对输入音频信号(PCM码)的128倍过采样。滤波器电路由VerilogHDL语言实现,利用SYNOPSYS提供的EDA工具进行仿真、综合,并通过FPGA验证,结果表明该电路能满足性能要求。
Abs A kind of interpolation filter for digital audio application is presented. The filter based on ployphase interpolation principle, consists of a parallel data input, a 8× interpolator, a 16 × sample- and - hold circuit, to over - sample （ 128× ） the audio signal （PCM code）. The filter is implemented with VerilogHDL, simulated and synthesized with SYNOPSYS EDA tools,and verified on FPGA. The simulation result illustrates it could gain performance satisfactorily.
出处
《现代电子技术》
2007年第6期1-3,共3页
Modern Electronics Technique
