16QAM解调器的FPGA实现

FPGA Implementation of 16QAM Demodulator

描述了一个用于微波传输设备的16QAM接收机解调芯片的FPGA实现,芯片集成了定时恢复、载波恢复和自适应盲判决反馈均衡器(DFE),采用恒模算法(CMA)作为均衡算法。芯片支持高达25M波特的符号速率,在一片EP1C12Q240C8(ALTERA)上实现,即将用于量产的微波传输设备中。

In this paper, FPGA implementation of a 16QAM receiver demodulation chip used for microwave transmission device has been presented. The receiver chip includes timing recovery, carrier recovery and bhnd adaptive decision feed back equalizer （DFE）. Constant modulus algorithm is used for the equalizer. The receiver chip supports high data rate up to 25Mbaud symbol rate. The receiver is implemented on EP1C12Q240C8 （ALTERA） which will be used on the microwave transmission device soon.