摘要
为获得信道编译码器的实际性能,建立了基于硬件的信道编码测试平台.给出了平台的设计方案.提出了一种改进的高斯白噪声设计方法.χ2和K-S检验结果表明,产生的样本服从高斯分布,且样本“尖锐”的自相关特性及近似常数的功率谱密度样本具有白噪声特性.在现场可编程门阵列(FPGA)上实现了此测试平台.经实例验证,建立的平台可用作信道编译码器和新型译码算法的测试工具.
In order to obtain the actual performance of channel codec, a channel coding test platform based on hardware was established. The design scheme is presented, and a modified Gaussian white noise generation method proposed. The chi-square test and K-S test showed that the generated samples complied to Gaussian distribution. The sharp characteristic of the auto-correlation function of the samples and approximate constant value of the power spectral density showed that the samples had the white noise property. The test platform is implemented on field programmable gate array （FPGA）, and application results showed that the test platform implemented can be used as a digital hardware test tool for channel codec or new decoding algorithms.
出处
《北京理工大学学报》
EI
CAS
CSCD
北大核心
2007年第2期156-160,共5页
Transactions of Beijing Institute of Technology
基金
国家部委预研项目
关键词
信道编码
高斯白噪声
测试平台
channel coding
Gaussian white noise
test platform
