摘要
在DSP+ARM为核心的嵌入式系统中,图形显示接口日益重要,利用显示和视频时序的原理,讨论了专用图形处理器及通用嵌入式开发板中实现视频时序的一般方法,给出了视频时序的实现过程,并提供了视频时序的VHDL语言具体实现。实践表明,该方法有效解决了嵌入式系统中图形显示能力不足、人机交互差的问题。
The graphic display interface becomes more important in the embedded system with the core of DSP+ARM. Based on the principles of video and display timing, this paper discusses the method of display timing for special graphic processor and for common embedded development panel. It provides the realization process and gives the concrete VHDL language. Practice shows that this method effectively resolves the problems of deficiency in graphic display and man-machine conversation in embedded system.
出处
《指挥控制与仿真》
2007年第2期107-110,共4页
Command Control & Simulation
关键词
嵌入式系统
FPGA
显示时序
同步
embedded system
display timing
FPGA(Field Program Gates Array)
synchronization