一维逻辑门布局和门-网关联图

One Dimensional Logical Gate Placement and Gate-Net Connection Graph

本文介绍一维逻辑门布局的一种新试探算法。在本算法中,决定顺序的准则是使每个门的轨道数尽量少,其特点是:①不需迭代,执行程序的CPU时间比[4]的短;③必须的轨道数不比[4]的多。

A New heuristic algorithm for one dimensional logical gate placement is presented in this paper . In the algorithm,the rule of deciding gates sequence is to minimize the track number of each gate. The properties of the algorithm are: (1) It has no need of iteration. The CPU time for running the program is shorter than , (2) The necessary track number is no more than.