基于扫描的SoC全速测试及应用

Scan-based At-speed Testing and Application of SoC

介绍了在系统级芯片(SoC)测试中所用到的基于扫描结构的全速测试。首先介绍了转换故障模型和路径延迟故障模型,以及测试时采用的具体的两种测试方法,然后总结了一些测试时要注意的事项。最后结合上述理论,对一款基于ARM的自主研发SoC芯片进行了实验,并用时序测试矢量对stuck-at故障进行模拟,减少了测试矢量的个数,节约了测试成本,得到了预期的结果。

This paper introduces the scan- based at- speed testing used in SoC. At first it introduces the transition fault module and the path delay fault module,including two specific methods which are used in testing. Then it summarizes several important vectors of testing . At last,we validate our theory by a SoC chip based on ARM processor. We simulate the stuckat fault with timing fault patterns because it can decrease the test volume and reduce test cost. The result is given in the conclusion.