基于FPGA/CPLD技术的数字频率计设计

Design of Digital Frequency Meter Based on FPGA/CPLD Technology

简述了基于FPGA/CPLD技术的数字频率计的总体设计。利用MUX+PLUSⅡ和protel99对系统原理图进行设计以及仿真;使用vhdl软件对硬件系统进行编程、仿真、测试;使用Protel99软件制作印刷电路板;运用单片机编程语言对AT89C51编程并通过仿真器将程序写入芯片,对系统进行调试,实现了测频功能。

This paper illustrates the general design of digital frequency meter based on FPGA/CPLD Technology. By means of two kinds of software the MUX ＋ PLUS Ⅱ and the protel99 proceed the design and imitate with MUX ＋ PLUS Ⅱ ; use the VHDL software to program, imitate, test to hardware system. ; make use of Protel99 software manufacture PCB board;use assemble language program to the AT89C51 and pass to imitate true the machine write in the procedure into the device , and debug on the system.