用FPGA实现ITU-656数据流的同步分离

Use FPGA to Separate Synchronization Signals from ITU-656 Data Stream

数字视频的同步不同于模拟视频的同步。传统的同步分离技术具有其局限性，不适用于数字视频。本文以ITU-656为例，简要介绍了其数据格式和同步原理，并分析了如何用VERILOG HDL编程提取其行、场同步信息，最后给出了部分核心代码和结果的波形图。

It＇s different from digital video and analog video on the synchronization,The tranditional technology about synchronizaion separating is not suitable for digital video,because there are mang limitations.AS a example ,this article has a simple introduce about ITU-656 on the data format and the synchronization machaism,and also analyses how to separate its synchronize signals with Verilog HDL languang.Finally,a part of core codes and the result＇s waveform are presented.