摘要
为了提高现有LVDS接口的工作速度,介绍了一种多电平LVDS收发器的设计,其发送器可以以5电平的形式发送数据,而接收器通过内部的数控增益和自动增益控制电路将接收到的信号恢复为一个固定幅度的信号供下一级AD转换为数字信号。仿真结果表明,在0.18μm/1.8V工艺条件下,此收发器实现了3.125Gb/s的数据传输速率。
In order to improve Data Rate of the conventional LVDS I/O port, this paper presents a design of multi-level LVDS tranceiver. The transmitter can send signals in multi-level（5）. A DGC （Digital-Gain-Control amplifier） an AGC （Antomatic-Gain-Control amplifier） are employed in the receiver, which can receive the signal and convert it into a constant-amplitude signals. After that we can easily revert the signals by ADC. The simulation results show that the Data Rate of the transceiver is promoted to 3.125Gb/s under SMIC 0.18μm/1.8V process.
出处
《微电子学与计算机》
CSCD
北大核心
2007年第4期69-71,75,共4页
Microelectronics & Computer
