摘要
给出了一种仅用加法器和移位器实现的、适用于嵌入式FPGA应用的,可重构的Σ-Δ调制器设计。它能够被设置为3阶或5阶,并可支持不同字长(16-/18-/20-/24-bit)的PCM数据输入。过采样率为128时,经仿真验证在3阶和5阶的情况下最大信噪比分别可以达到110dB和150dB,精度为18bit和24bit,可以应用于CD,SACD和DVD等不同格式的音频解调中。
In this paper,a scheme of re-configurable Sigma-Delta Modulator (SDM) only using adders and shifters is advised, which is suitable for embedded FPGA applications. It can be configured as 3rd or 5th order SDM and it accepts 16-/18-/20-/24-bit PCM data input in. When the over sampling rate is 128, the ∑-△ modulator can achieves llOdB SNR and 150dB SNR for 3rd or 5th order SDM, respectively. The precision is 18bit and 24bit. This SDM can be used in audio demodulation of CD, SACD,DVD and so on.
出处
《微电子学与计算机》
CSCD
北大核心
2007年第4期159-162,共4页
Microelectronics & Computer
基金
上海应用材料基金项目(AM0513
AM0508)