超级流水S进制PRNS数母全加器

SUPERPIPELINED S-ARY PRNS DIGITAL FULL-ADDER

本文是文献［１，２］的续篇．作者在该ＰＲＮＳ数母全加器的研制中采用了与文献［１］不同的算法，避免了溢出判别变量Ｖｉ１表达式过长和工程实现上的困难．另外在设计和实现中还采用了超级流水技术，使得３３６进制的数母全加器的操作周期仅有７ｕｓ，即最高时钟频率达１４３ＭＨｚ．

This paper introduces a new algorithm adopted in development of the PRNS digital full-adder. It avoids long expression Vi1, judging overflow variable,and the difficulty in implementing. Also, the superpipelined method is used in the design and implementation so that the full-adder's clock is reduced to 7us.