FPGA的配置及其接口电路的设计

Configuration of FPGA and Design of Its Interface Circuit

本文介绍对XILINX公司SpartanⅡ系列的XC2S50的FPGA配置数据的方法。提出了利用CPLD和FLASH组成串行配置系统实现对FPGA的上电配置以及通过计算机并口实现数据的传送和监测的方法。对内部的控制电路的电路结构、软件设计等方面进行了阐述。在此系统之上实现了计算机串口与SDRAM之间的相互通信。实验结果表明系统功能可靠、实用。经测试系统最大时钟频率可以达到76.923MHz,FLASH的读写速率可达到111Mbs。与基于单片机配置的方法比较,高速安全的完成对FPGA的上电配置。

The article introduces a configuration method for XC2S50 FPGA, which is a member of Spartan Ⅱ family from XILINX corporation. The configuration method uses a serial system composed of CPLD＆ FLASH, and realizes data transmitting and monitoring through the parallel port of a computer. The circuit structure of the control circuit and the software design are explained. The interface between SDRM and FPGA was designed, and mutual communication between the serial port of the computer and SDRAM was realized. Experiment result indicates that the system functions stably and reliably and is practical; through testing, the maximum system clock frequency reaches to 76.923MHz, the reading and writing speed of FLASH reaches up to 111Mbs. Compared with microcontroller configuration method, the proposed method can safely configure FPAG with high speed during power on.