4H-SiC MESFET表面陷阱效应研究

A Study on the Surface Trap Effect on 4H-SiC MESFET's

借助ISE TCAD,对4H-SiC MESFET进行二维数值模拟,研究分析了表面陷阱对直流和瞬态特性的影响。数值模拟表明,在直流特性上,由于表面陷阱电荷引入附加耗尽层,器件饱和电流下降,输出电阻增加,夹断电压向右偏移,跨导降低;在瞬态特性上,表面陷阱电荷的缓慢变化引起了栅延迟的出现。能级靠近价带、密度较高时,表面陷阱效应越明显。

Surface-trap effects on DC and transient characteristics in 4H-SiC MESFET＇s are investigated by using two-dimensional numerical simulation. Results show that, for DC characteristics, the added depletion layer induced by surface trap charge will cause saturation current decrease, output resistance increase, pinch-off voltage drift to right, and transconductance reduction, and for transient characteristics, slow change of the surface trap charge will result in the gate-lag phenomenon. When the energy level of surface traps is located in the lower half of the energy gap, the gate lag becomes remarkable. As a result, devices with lower surface state density efficiently degrade the gate lag phenomenon.