摘要
提出了一种基于3DES加(解)密双方认证系统的IP核保护方法,主要用于保护基于SRAMD工艺FPGA设计的IP核电路。在配置好的FPGA中,通过IP核外附加的内部保护电路和外部验证设备之间的互相通信认证,确认使用者的合法性,可有效防止IP核信息配置到FPGA过程中的非法盗取。详细介绍了这种新IP核保护方法的原理、结构和实现过程,并设计了一套基于此技术的简化双方认证系统。
A new IP protection method is described, which is a mutual authentication based on triple DES and is applicable for protection of security for SRAM FPGA bit streams. Legality of the IP core user is assured through the communication authentication between inner protection circuit outside IP core in FPGA and the external authentication device, which protects IP core information efficiently from detection and replication when it is downloaded into FPGA. The principle, architecture and implementation of the IP core protection system are demonstrated, and a simplified mutual authentication system using this new technology is designed.
出处
《微电子学》
CAS
CSCD
北大核心
2007年第2期185-188,共4页
Microelectronics
基金
上海-应用材料研究与发展基金资助项目(0506)