摘要
提出了一种基于提升小波变换和SPIHT算法的图像压缩编码的VLSI结构。小波变换部分采用流水线及分时复用的技术,节省了硬件资源,提高了运算速度,增强了稳定性。SPIHT算法采用多阈值的四路并行处理结构,提高了编码效率。基于上述方法的FPGA实现,能够满足图像存储、传输等方面的要求。
A VLSI architecture for the implementation of image compression coding using pipeline and time division multiplexing technology in lifting wavelet transform and SPIHT was proposed. This structure uses less hardware resource, and increases operation speed and stability. SPIHT algorithm with multi- threshold quadruple parallel processing can enhance coding efficiency. The FPGA realization based on this structure can satisfy the requirement of image storage and transmission.
出处
《吉林大学学报（工学版）》
EI
CAS
CSCD
北大核心
2007年第3期675-680,共6页
Journal of Jilin University:Engineering and Technology Edition
基金
国家自然科学基金资助项目(60476024)
吉林省科技发展计划项目(20050515)
珠海市科技发展计划项目(PC20051011)
关键词
信息处理技术
图像压缩
提升小波变换
多阈值SPIHT
VLSI
时分复用
并行流水结构
information processing technology
image compression
lifting wavelet transform
multithreshold SPIHT
VLSI
time division multiplexing
pipeline architecture
