基于CPLD的弹载高速存储测试系统关键技术研究

The Key Technology Study Based on the High-speed Storage Measurement and Test System Attached to Bullets

针对弹载高速存储测试的要求,采用CPLD作为控制核心,设计了高速存储测试系统。重点介绍为满足高速采样要求的控制模块、AD模块、存储模块的设计,提出了用CPLD内部丰富的逻辑单元实现UART的功能完成测试数据上传。经过系统仿真,验证了该系统可以完成对模拟信号的高速采样、存储及数据上传功能。

Aiming at the request of the high-speed storage measurement and test attached to bullets, the high-speed storage measurement and test system was designed by adopting CPLD as controlling core. The designs on controlling module, AD module and storage module, which satisfied with the high-speed sampling request, were introduced emphatically. An idea that the comprehensive logic unit contained in CPLD can realize UART function and further complete data upload was proposed. It is demonstrated by the system emulation that the system can complete the functions of the high-speed sampling of analog signals, storage and data upload.