基于存储技术的高速嵌入式处理器的设计与实现

Design and Implementation of High Speed Embedded Processor Based on Memory Technique

SoPC(片上可编程系统,System on a Programmable Chip)在嵌入式系统中有着广泛的应用,通常用FPGA(现场可编程门阵列,Field Programmable Gate Array)实现.一类嵌入式处理器,例如小波变换处理器、压缩和解压缩处理器、FFT处理器,都可以采用基于存储技术的设计方法.FPGA的片内存储资源相对较少,如何有效地利用FPGA的片内存储资源实现高速的嵌入式处理器成为需要研究的问题.文中以FFT处理器为例说明这种方法的有效性,通过采用一种地址映射调度策略和两种无冲突操作数地址映射方式,减少了所使用的FPGA片内存储资源,提高了处理速度.该FFT处理器在实际系统中起到了关键作用.

SoPC（System on a Programmable Chip） which is usually implemented in an FPGA （Field Programmable Gate Array） is widely used in the embedded systems. A kind of embedded processors, such as the wavelets transform processor, the compress/decompress processor and the FFT processor, can adopt the design method which is based on memory technique. However, the memory resources in FPGA are relatively limited. How to efficiently use memory resources in FPGA to design high speed embedded processors has become a problem which should be researched. An FFT processor is proposed in the paper as an example to demonstrate the validity of the method. An address mapping scheduling strategy and two non-conflict address mapping modes are adopted in FFT processor design to reduce the memory resources usage in FPGA and improve the processing speed. The proposed FFT processor has played an important role in the practical application .