Nios SoC系统中的BCH编解码IP核的设计

Design of BCH Code IP Core in Nios SoC System

在编码理论中,BCH码是一种得到深入研究的循环纠错码。SoC(片上系统)设计是电子设计的发展方向。BCH码的SoC实现方法和传统的多片实现方法相比,在工程上具有便捷、小型化及高速等特点。文中分析了使用SoC设计方法完成BCH编解码的设计思路;给出了BCH编码、Berleka-mp译码以及CPU接口的实现细节;同时给出了重要模块的仿真结果。

The BCH codes are the much studied codes within the study of coding theory and BCH codes are cyclic error-correcting codes. The system on chip （SoC） design is the development direction of the electrical design. Compared to the traditional realization method, the SoC realization method of the BCH codes is convenient, small scaled and high speed on the engineering. The paper analyzes the design idea of SoC design method ; gives the realization detail of BCH encoding, Berlekamp decoding and CPU interface ; gives the simulation result of important logic module.