基于FPGA的M-JPEG实时编码器设计

FPGA-based M-JPEG Compression Encoding

针对在嵌入式系统中用软件进行压缩编码速度较慢的问题,设计一种基于FPGA的M-JPEG压缩处理结构。该结构充分利用FPGA的特点,提出用一个1D-DCT模块实现2D-DCT变换的新方法,并且根据M-JPEG基本原理,对图像处理算法做了一系列改进,使单幅320×240图像压缩的时间达到8.412ms,满足了图像压缩的实时性要求。

This paper presents a FPGA-based structure for M-JPEG compression to solve the problem of low image-compression speed by software in embedded system. Making full use of FPGA, the design carries out a new method to implement 2D-DCT with one single 1D-DCT module and improves efficiency of the image-processing algorithm according to basic principles of M- JPEG. Compression speed of this structure achieves 8.412 ms per frame of 320×240 pixels, fulfilling the requirement of real time operation.