期刊文献+

∑Δ调制器输出码流FFT谱分析的探讨 被引量:3

The Analysis of Sigma-Delta Modulator Bit-Stream FFT
下载PDF
导出
摘要 ∑Δ调制器输出码流的频谱中含有大量高频噪声,在对其进行FFT谱分析时,需要加窗函数抑制这些高频噪声对基带噪底的泄漏。由于∑Δ调制器输出码流的噪声主要是高频噪声,因此需要滚降衰减较大的窗函数,窗函数选择不当会使其有效位数有2~6位的下降。实例表明,对于超过20bit精度的∑Δ调制器,选用Balckmanharris窗比Hanning窗更合适。 The output spectrum of Sigma-Delta Modulator contains lots of high frequency noise, which will leak into the base band. This paper put forward that only the fast-roll-down attenuating windows are suitable for Sigma-Delta Modulator FFT analysis, and the unsuitable windows will lead to 2-6 bits ENOB drops. Experiment shows that Balckmanharris window is more suitable for 20-bit Sigma-Delta Modulator than Harming window.
出处 《微电子学与计算机》 CSCD 北大核心 2007年第5期116-119,共4页 Microelectronics & Computer
关键词 Sigma—Delta 调制器 FFT 窗函数 sigma-delta modulator , FFT window function
  • 相关文献

参考文献5

二级参考文献23

  • 1S Moussavi and B Leng. High-order single-stage single-bit oversampling A/D converter stabilized with local feedback loops. IEEE Trans. Circuits Sys.-Ⅱ: Analog and Digital Signal Processing, Jan. 1994,41(1):19-25.
  • 2Phillip E Allen and Douglas R Holberg. CMOS Analog Circuit Design. Oxford University Press, Inc. 2002.
  • 3D Kerth, D Kasha, T Mellissinos, D Piasecki, E Swanson.A120 dB linear switched-capacitor Delta-Sigma modulator.In Proc.1994 IEEE ISSCC, Feb. 1994: 196-197.
  • 4S Harris. How to achieve optimum performance from Delta-Sigma A/D and D/A converters. J Audio Eng. Soc., Oct.1993,41(10): 782-790.
  • 5D Ribner, R Baertsch, S Garverick, D McGrath, J Krisciunas and T Fujii. A third-order multistage Sigma-Delta modulator with reduced sensitivity to nonidealities. IEEE J.Solid-State Circuits, Dec. 1991,26: 1764-1774.
  • 6Ichiro Fujimork, Kazuo Koyma, Davia Trager, Fred Tam and Lorenzo Longo. A 5-V Single-Chip Audio A/D Converter with 111dB Dynamic Range. IEEE J.Solid-State Circuits,March, 1997,32: 329-336.
  • 7J Lloyd, H S Lee. A CMOS opamp with fuRy-differential gain-enhancement. IEEE Trans Circuit Systems-Ⅱ: Analog and Digital Signal Processing, Mar.1994,41: 241-243.
  • 8S Chu, C Burrus. Multirate filter designs using comb filters.IEEE Trans.Circuit Sys, Nov.1984,CAS-31:913-924.
  • 9H Inose, Y Yasuda, J Murakami. A telemetering system code modulation-△-∑ modulation[J]. IRE Trans. SpaceElect. Telemetry, 1962, 8(9):204-209.
  • 10A N Karanicolas, H S Lee, K L Bacrania. A 15-b 1-Msample/s digitally self-calibrated pipeline ADC[J]. IEEE J.Solid-State Circuits, 1993, 28(12):1207-1215.

共引文献8

同被引文献35

  • 1邱兆坤,王伟,马云,陈曾平.一种新的高分辨率ADC有效位数测试方法[J].国防科技大学学报,2004,26(4):1-5. 被引量:27
  • 2崔庆林,蒋和全.高速A/D转换器测试采样技术研究[J].微电子学,2006,36(1):52-55. 被引量:10
  • 3骆丽娜,杨万全.高速ADC的性能参数与测试方法[J].实验科学与技术,2007,5(1):145-147. 被引量:23
  • 4Malcovati P, Brigati S, Francesconi F. Behavioral modeling of switched - capacitor sigma - delta modulators [ J ]. IEEE Trans. on Circuits and Systems Ⅰ, 2003(50) : 352 - 364.
  • 5Hashem ZareHoseni, Izzet Kale, Omid Shoaei. Modeling of switched - capacitor delta - sigma modulators in Simulink[ J ]. IEEE transactions on instrumentation and measurement, 2005, 54(4) : 1646- 1654.
  • 6Hai Tao H, Toth L, Khoury J M. Analysis of timing jitter in bandpass sigma - delta modulators [ J ]. IEEE Trans. Circuits Syst.Ⅱ, 1999(46): 991- 1001.
  • 7Enz C, Temes G. Circuit techniques for reducing the effects of op - amp imperfections: autozeroing, correlated double sampling and chopper stabilization[J]. IEEE, 1996 (84) : 584 - 614.
  • 8Medeiro F, PerezVerdu B, Rodriguez Vazquez A. Modeling opamp- indueed harmonic distortion for switched - capacitor ∑-Δmodulator design[J]. IEEE Int. Syrnp. Circuits and Systems, 1994(5) : 445 - 448.
  • 9Rio R del. Reliable analysis of settling errors in SC integrators: application to ∑-Δ modulators[J]. Electron. Lett., 2000(36) : 503 - 504.
  • 10Walt Kester.了解SINAD、ENOB、SNR、THD、THD+N、SFDR,不在噪底中迷失[EB/OL].ADI,MT-003,2008.http://www.analog.com.

引证文献3

二级引证文献12

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部