SOI LDMOS功率器件的研究与制备

Design and Fabrication of LDMOS Power Device on SOI Substrate

根据REUSRF原理,对器件参数进行优化。采用与常规CMOS工艺兼容的技术,在SIMOX片上制备了薄膜SOI LDMOS功率器件。器件呈现良好的电学性能:漏极偏压5V时,泄漏电流仅为1nA;当漂移区长度为4μm时,关态击穿电压达到50V,开态击穿电压大于20V;器件的输出曲线在饱和区光滑,未呈现翘曲现象,说明体接触有效地抑制了部分耗尽器件的浮体效应。这种SOI LDMOS结构非常适合高温环境下功率电子方面的应用开发。

SOI LDMOS power device was optimized according to the RESURF （Reduced Surface Field） principle, and was fabricated on SIMOX wafer with a process compatible with the conventional SOI CMOS technology. It shows good electrical performance including a block voltage capability of 50V, a leakage current of 1 nA, a flat output characteristic curves without any kink effects indicating the validity of body contact. The device has promising prospective for power electronics in high - temperature environments.