基于加权Gray码及实时状态检测的异步FIFO设计

An Asynchronous FIFO Design Based on Weighted Gray Coding and Real-Time State Detection

本文提出了一种新颖的异步FIFO设计，它采用加权Gray码进行指针编码，采用实时的全局状态检测器来控制写／读，是一种高性能的异步FIFO。模拟结果表明，在FIFO深度为4～16的情况下，该设计与已有的FIFO设计相比在性能以及面积开销等方面都获得了明显的改善。该异步FIFO在多核SoC互连设计中具有广泛的应用前景。

A novel asynchronous FIFO design is presented in this paper. It employs a weighted gray code as the write/ read pointer code,and controls write/read operations using a real-time global state detector. It is a high-performance asynchronous FIFO design. Simulation results show that the performance and area cost are both considerably improved compared with other available FIFOs under the depth range of 4-16. The asynchronous FIFO can be widely used in the interconnect design of multi-core SoC.