数字集成电路设计中的硬件加速验证技术

Hardware-based HDL Verification in Digital IC Design

在芯片规模指数式上升和要求面市时间快速缩短的双重压力下,验证已成为数字集成电路设计的瓶颈。利用硬件加速验证技术能很好地解决这一问题。该文论述了硬件加速验证系统的工作原理和组成结构,通过与传统HDL仿真器的比较证明了其优势,并以Aldec公司硬件加速验证工具HES为例说明了硬件加速验证的验证流程。

Under pressure of the increase of chip scale and the decrease of timing to market, verification has become the bottleneck of digital IC design. Hardware - based HDL verification is a good solution to this problem. This paper describes the principle and the structure of hardware- based HDL verification system,demonstrates its advantages through the comparison with traditional HDL simulators,and introduces the verification flow based on HES of Aldec.