一个用可编程门阵列实现的SPWM波形发生器

A SPWM WAVEFORM GENERATOR IMPLEMENTED USING FIELD PROGRAMMABLE GATE ARRAYS

介绍一个基于ＲＯＭ的正弦脉宽调制（ＳＰＷＭ）波形生成电路。该电路用一片用户可编程门阵列（ＦＰＧＡ）芯片实现，电路设计只需将１／４周期的ＳＰＷＭ波形数据存于ＦＰＧＡ内部硬件资源所构造的ＲＯＭ中，因此减少了硬件开销。具有载波频率高，抗干扰能力强。

A ROM-based sinuous pulse width modulation (SPWM) waveform generating circuit is presented,which is implemented in a field programmable gate array (FPGA) chip.For this design,SPWM waveform data only in one 1/4 sinuous cycle are required to be stored in ROM that is constructed with internal hardware resource of the FPGA.High carrier frequency,insensitivity to interference and easily-modifying in design are obtained with the circuit.