LowTARP:低温交替改善的模拟退火布局算法

LowTARP: a Novel Low Temperature Alternating Refinement Placer

在模拟退火算法的基础上,提出一种“低温交替改善”的FPGA布局算法.在模拟退火的低温阶段,该算法不仅交换可配置逻辑单元(CLB)的位置,也改变逻辑单元(LE)所属的CLB,即同时对布局和装箱进行优化,并采用布局的目标函数来衡量装箱的优劣.实验数据表明,采用3种不同的装箱算法的结果作为布局的输入,布线通道宽度与最具代表性的VPR布局算法相比,分别提高21.3%,15.5%和10.7%,而引入的额外计算量不到20%.

A novel simulated annealing based FPGA placement algorithm with ＇low temperature alternating refinement＇ technique is proposed. The new placer simultaneously optimizes both placement and packing at low temperature phase by swapping not only CLBs but also LEs. And the placer＇s cost function is used to judge if new packing is better or not. Experimental results show that taking three different packing algorithms＇ output as the input to placement, the proposed method requires 21.3%, 15.5%, 10.7% fewer number of routing tracks than VPR respectively. And, the extra computation induced is less than 20% for all cases.