基于二维卷积的图像插值实时硬件实现

Real-time hardware implementation of 2-D convolution-based image interpolation

为了实时实现图像处理中的图像插值,提出一种与具体插值算法无关的通用二维卷积器实现结构和一种使用2级缓存的图像数据存取结构。利用所提出的结构,设计了使用双三次插值的图像插值模块,在可编程逻辑门阵列上进行了实现和图像实时放大的实验。实验结果表明:采用本结构,可以降低片上存储器的消耗,方便地实现比较复杂的插值,可达到实时处理的目的。

An algorithm independent hardware architecture based on 2-D convolver was proposed for the implementation of real-time image interpolation. A two-level caching mechanism was introduced to access image data. An image interpolation module using bi-cubic interpolation was implemented based on the scheme, and mapped into a field programmable gate array （FPGA） chip. Image zooming experiment results show that the architecture can be easily adopted for the implementation of sophisticated image interpolation algorithms and real-time operations can be achieved, as well as a reduction of the amount of memories used for calculation.