VHDL高级综合系统设计中某些关键问题的技术决策

TECHNICAL DECISION ON SEVERAL KEY PROBLEMS IN VHDL HIGH LEVEL SYNTHESIS SYSTEM

本文的研究实现了从电路系统行为（含算法及功能）的ＶＨＤＬ描述到ＲＴＬ和逻辑结构级描述的高级综合，并针对ＸｉｌｉｎｘＦＰＧＡ文件库映射成工艺相关的ＡＳＩＣ，直至生成ＦＰＧＡ的器件．整个系统包括七个部分，本文重点讨论每个部分的技术决策以及在ＳＵＮＳＰＡＲＣ２上实现的运行结果．

This paper researches realization of the high level synthesis from system behavioral (algorithmic and functional) description of circuit to structural description of RTL and logic level. Based on Xilinx FPGA library, the structural description is mapped to technology-dependent ASIC, FPGA chips are generated at last.In this paper, the main points include the technical decision of each of the seven sub-system of the whole system. The system is realized on SUN SPARC 2, and correct running results are showed.