时钟电路的电磁兼容性设计

EMC Design of Clock Circuit

对时钟电路设计中的3个主要问题:阻抗、传输延迟以及容性负载分别进行了阐述、分析与计算,得出了能够改善时钟电路电磁兼容性(EMC)的设计方法,并通过实践得以证实。

This paper describes, analyses and caculates the three main problems, impedance, transmission delay and capacity load in the clock circuit design,obtains the design methods to improve the electronmagnetic compatibility（EMC） of clock circuit,and confirms it through the practice.